This invention relates to semiconductor devices and more particularly to field effect transistors.
Field effect transistors are well known three terminal semiconductor devices which are used in microwave and millimeter wave applications for low noise and in some instances high power amplification. Typically, metal semiconductor field effect transistors (MESFET) utilize Schottky barrier gates under reverse bias to modulate the channel conductance between the source and drain terminals. However, the Schottky barrier heights on these devices are essentially fixed which restricts the voltage range used on the Schottky gate. In addition, high quality Schottky barriers cannot be obtained in such semiconductors as Ga.sub.x In.sub.l-x As and InP.
In the above referenced copending application issued as U.S. Pat. No. 4,410,902 entitled, "Planar Doped Barrier Semiconductor Device", there is disclosed a majority carrier rectifying barrier semiconductor device having a planar doped barrier. The device is fabricated in GaAs preferably by molecular beam epitaxy (MBE) which results in a semiconductor structure wherein an extremely narrow planar doped space charge region is positioned between adjoining planar regions of nominally undoped semiconductive material. The narrow widths of the undoped regions and the high densities of the ionized impurities within the space charge region results in rectangular electric fields and potential barriers, respectively. Independent and continuous control of the barrier height and the asymmetry of the current vs. voltage characteristics is provided through variation of the acceptor charge density and the undoped region widths.
In the second above-referenced patent application entitled, "Planar Doped Barrier Transistor", there is disclosed a three terminal epitaxial layer semiconductor structure in the form of a transistor comprised of two rectifying planar doped barriers separated by an intermediate semiconductor region with the two barriers having respective predetermined barrier height characteristics which are altered upon the application of a bias potential thereacross and with the intermediate region providing a region for the controlled injection and collection of electrons from one of the barriers whereby majority carriers, such as electrons will surmount and be swept across the other barrier when the peak of the other barrier is below the peak of the first barrier as a result of the applied bias. In such a structure, the majority carrier flow is essentially vertically through the structure.
It is an object of the present invention, therefore, to provide an improvement in field effect semiconductor devices.
Another object of the invention is to provide improvement in field effect transistors.
It is yet another object of the invention to provide a field effect transistor wherein the conventional Schottky barrier gate is replaced with a planar doped barrier gate.